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ELTA Paper VI March 2011

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Electronics Honours Paper VI March 2011 solution View Questions
Gr. A
Unit-I: Digital Electronics

1. (a) Perform a straightforward binary subtraction.

(b) Use de Morgan's laws successively to arrive at the result (AB' +A'B).

(c) 10's complement of 156 is given by : 9's complement of 156 + 1 9's complement of 156 = (10^{n}-1) - 156 (n=3=no: of digits in integer part of 156) therefore 9's complement of 156 = 999 - 156 = 843 Express 999 and 156 in BCD, perform the subtraction and add 1 to the result to obtain 10's complement of 156 in BCD form.

(d) Study the chraracteristics of IC digital logic families [Reference 1 page 66]

2. (a) Use two BJTs, biasing resistors, a power supply and switches to construct a two input NAND gate. You may not draw the circuit of a TTL NAND gate. Study the chraracteristics of IC digital logic families [Reference 1 page 66]

(b) F(A,B,C) = AC + AB' = AC(B+B') + AB'(C+C') = ACB + ACB' + AB'C + AB'C' = ABC + AB'C + AB'C'

(c) Since highest minterm is m_{7} therefore you need to use a 3 variable Karnaugh map.. Put 1s in the position of the minterms, make use of 2 quads in the map to obtain the reduced SOP (Sum of Products) form of F as B+C.

Since F=summation m(1,2,3,5,6,7), using the pair of 0s coresponding to the minterms 0 and 4 absent in F we obtain, F' = summation m(0,4) = B'C'. therefore F = F'' = B+C gives the POS form for F. [Reference 1 page 83]

3. (a) With Enable input E=1 outputs Y_{i} = D_{i} i=0,1,2,3 corresponding to select input cobination S_{1}, S_{0} being 0 0, 0 1, 1 0 and 1 1. With Enable input E=0 the outputs would hold their previous values.

Do not forget to mark the points where two wires are conencted in the circuit figure.

(b) A 2:1 MUX has 1 select input, 2 data inputs and 1 output. F=X+Y represents an OR output. From the truth table of an OR gate we may observe that when X=0 output F=Y and when X=1, output F=1. Therefore use X as the only select input, use Y as the first data input (D_{0}) and use 1 (connect to supply) as the data second data input (D_{1}). Use similar reasoning to obtain F=(X+Y)' (NOR function) as well. [Reference 2]

4. (a) Do not forget to include the clock as one of the inputs in the truth table for J-K flip flop. Race around condition implies the case of toggling more than once as when J and K inputs are high and as long as the clock pulse is high, leading to ambiguous output. It can be eliminated by using either an edge triggered J-K flip flop or a master-slave J-K flip flop. Draw the circuit and explain the operation of either one of the two.

(b) A D flip flop has only one input and the output follows this input at a clock edge. So connect the J input to the K input of the J-K flip flop via a NOT gate. This ensures that the J-K inputs entering the J-K flip flop are either 0 1 or 1 0 leading to outputs of 0 and 1 respectively. Thus the output follows the J-input and we have the D flip.

5. (a) An ADC is an Analog to Digital Converter, which converts an analog voltage or current to a digital equivalent (binary number).

(b) [Reference 3 page 485, Reference 2 page 920]

(c) EPROM: Erasable Programmable Read-Only Memory
EEPROM: Electrically Erasable Programmable Read-Only Memory
The entire EPROM chip can be erased by exposing it to ultraviolet light through its quartz window while individual registers of an EEPROM may be erased using electrical signals. [Reference 4 page 79]

Gr. A
Unit-II: Microprocessors

6. (a) [Reference 4 pages 107-108]

(b) Instruction cycle [Reference 4 page 104]
Timing diagram of fetch and execute cycles [Reference 4 page 100-102] To keep the answer simple, draw the timing diagram pertaining to an op-code fetch and execute cycle for an instruction say (MOV C,A) clearly showing the T states or clock pulses, the higher order address bus A_{15}--A_{8}, the multiplexed lower order address and data bus AD_{7}--AD_{0}, the different signals: ALE, IO/M', RD' and mention the values of the status signals S0 and S1.

7. (a) A BUS is a group of wires used to transfer data between the microprocessor, the memory and the input and output devices as also between different parts inside the microprocessor. They are of three types: The unidirectional address bus used to send the address, a bidirectional data bus to send the data bits and the control bus to send the control signals.

The address/data bus in the 8085 microprocessor refers to the multiplexed lower order address and data bus AD_{7}--AD_{0}. A diagram of the schematic of the demultiplexing scheme used to demultiplex the address and data buses using an 8 bit latch may be provided [Reference 4 pages 103].

(b) Program counter is a 16 bit special purpose register inside the 8085 microprocessor. It contains the address of the memory location from which the next byte of an instruction is to be fetched. After fetching, it increments itself by one.

The stack pointer is another 16 bit special purpose register inside the 8085 microprocessor. It contains the address of the memory location pertaining to the top of the stack. When the contents of a register pair are pushed onto the stack, the stack pointer decrements by two. On the other hand if the top two bytes from the stack are popped out and sent to a register pair, the stack pointer increments by two.

Instructions used in stack operation:
To define the stack-top: LXI SP [address]
To push 2 bytes onto the stack from the regisrer pair (say) BC: PUSH B
To pop 2 bytes out of the stack into the regisrer pair (say) DE: POP D

8. (a) I/O devices refer to peripheral devices like input devices which transfer data from the outside world to the microprocessor (e.g. keyboards, analog to digital converters etc) and output devices which transfer data from the microprocessor to the outside world (e.g. light emitting diodes, cathode ray tubes, monitors, video screens, printers and digital to analog converters).

The 8085 microprocessor uses the cobination of three status signals IO/M', S1 and S0 to differentiate between input and output devices. [Reference 4 page 99]

Input device: IO/M' = 1 S1 = 1, S0 = 0 (Also RD' = 0 and WR' = 1 in this case)
Output device: IO/M' = 1 S1 = 0, S0 = 1 (Also WR' = 0 and RD' = 1 in this case)
It may be noted that data can only be read from an input device and only be written into an output device.

(b) TRAP, RST 7.5, RST 6.5, RST 5.5 and INTR [Reference 4 pages 385-386]. Mention may be made of different classification schemes, vectored and non-vectored, maskable and non-maskable, as also priority of interrupts.

(c) DMA stands for Direct Memory Access: In situations where microprocessor controlled data transfer is slow, DMA is used. In this scheme, an external peripheral device called the DMA controller sends a high HOLD signal to the microprocessor, which then sends out a high HLDA (hOLD acknowledge) signal back to the controller and transfers the control of the address and data buses to the controller. The DMA controller then transfers data directly between the peripheral and the R/W memory, bypassing the microprocessor in the process. [Reference 4 pages 397-398].

Gr. B
Unit-I: Communication

9. (a)A channel in communication is a path through which information signal is passed. The difference between the highest and lowest frequencies in the band of frequency components which are passed by the channel with more or less constant gain is called the channel bandwidth.

(b) (i) A time-invariant system is one in which the output does not depend explicitly on time whereas in a time-varying system, the output does depend explicitly on time.
e.g. System A: y(t) = k x(t) where x(t) is the input signal, y(t) is the output signal and k is a constant.
System B: y(t) = t x(t) Since in system B, output depends explicitly on time (t), it is time varying, whereas in system A, output depends on time implicitly through the input but not explicitly. So it is time-invariant [Reference 5].

(ii) A signal g(t) which is limited in time or its amplitude -> 0 as |t| -> infinity has a finite energy and zero power. Such signals are called energy signals, e.g. a single square pulse signal or an exponentially decaying signal.
A signal f(t) which is not limited in time so that its amplitude does not -> 0 as |t|-> infinity is called a power signal. It has infinite energy but finite power; e.g. a periodic sine wave signal or a pulse train signal [Reference 6 page 15].

(c) Parseval's Theorem states that the signal energy can be obtained both in terms of the time-domain signal g(t), or frequency domain signal G(w), as follows: [Reference 6 pages 115-116].
Signal energy = E_{g} = ^{+infinity}integration_{-infinity} |g(t)|^{2} dt = (1/(2pi))^{+infinity}integration_{-infinity} |G(w)|^{2} dw.
g(t) = e^{-at} u(t) (a > 0)
Therefore G(w) = ^{+infinity}integration_{-infinity} g(t) e^{-jwt} dt = ... = 1/(a +jw)
E_{g} can then be found both using g(t) and G(w) as equal to 1/(2a).
Thus Parseval's Theorem is proved for the given signal.

10. (a) [Reference 7].

(b) Modulation index (m) = V_{m}/ V_{c} = 3V/5V = 0.6
upper sideband frequency = f_{c} + f_{m} = 5MHz + 4 KHz = 5004 KHz
lower sideband frequency = f_{c} - f_{m} = 5MHz - 4 KHz = 4996 KHz
amplitude of sidebands = mV_{c}/2 = 0.6*5V/2 = 1.5 V

(c) In a square law modulator, the carrier and modulating signals are combined and then applied across a pn diode - resistor combination. The current through the diode and hence the resistor as well follows square-law relationship: i(t) = a*v(t) + b*v(t)^{2}. This current and hence the output voltage across the resistor would contain the amplitude modulated frequency components: w_{c}, w_{c} + w_{m} and w_{c} - w_{m} along with other frequency components like 2*w_{m} and 2*w_{c}. A band pass filter is employed at the output to pass the former and block the latter. [Reference 8].

11. (a) [Reference 9 pages 323-328]
In FM, instanteneous frequency f_{i}(t) = f_{c} + k*e_{m}(t)
= f_{c} + k*E_{m max}*cos(2*pi*f_{m}t)
= f_{c} + (delta f)*cos(2*pi*f_{m}t)
(delta f) = k*E_{m max} is called the maximum frequency deviation since limits of cosine function are +1 and -1

The frequency modulated (FM) carrier is expressed as: e_{c}(t) = E_{c max}*cos(theta_{i}(t))
theta_{i}(t) is the instanteneous total phase angle which can be obtained from f_{i}(t) as follows

theta_{i}(t) = integration^{t}_{0} 2*pi*f_{i}(t) dt
= integration^{t}_{0} 2*pi* (f_{c} + (delta f)*cos(2*pi*f_{m}*t)) dt
= 2*pi*f_{c}*t + 2*pi*(delta f)*integration^{t}_{0} cos(2*pi*f_{m}*t) dt
= 2*pi*f_{c}*t + (delta f)/(f_{m})* sin(2*pi*f_{m}*t)
= 2*pi*f_{c}*t + beta* sin(2*pi*f_{m}*t) where beta = (delta f)/(f_{m}) = modulation index for FM

So the expression for the FM wave becomes:
e_{c}(t) = E_{c max}*cos(2*pi*f_{c}*t + beta* sin(2*pi*f_{m}*t))

beta and (delta f) are related to the transmission bandwidth in FM through the equations:
Bandwith_{FM} = 2*(beta+1)f_{m}
= 2*((delta f)+f_{m})
So as (delta f) increases, the bandwidth also increases, even if f_{m} is kept constant.

The above equations are for understanding purposes only. You need to only produce the pertinent ones while answering the question.

(b) [Reference 9 pages 333-334 and Reference 10 pages 89-91]

(c) frequency modulated signal = e_{FM}(t) = E_{c max}*cos(2*pi*f_{c}*t + beta_{FM}* sin(2*pi*f_{m}*t))
beta_{FM} = (delta f)/f_{m} and (delta f) = k*E_{m max}
e_{FM}(t) can be expressed as
= E_{c max}*cos(2*pi*f_{c}*t + integration^{t}_{0} k*E_{m max}*cos(2*pi*f_{m}*t) dt )
= E_{c max}*cos(2*pi*f_{c}*t + integration^{t}_{0} k*e_{m}(t) dt )
instanteneous frequency = f_{c} + (delta f)*cos(2*pi*f_{m}t)
= f_{c} + k*E_{m max}*cos(2*pi*f_{m}t)
= f_{c} + k*e_{m}(t)
Thus modulating signal = e_{m}(t) = E_{m max}*cos(2*pi*f_{m}t)

Phase modulated signal = e_{PM}(t) = E_{c max}*cos(2*pi*f_{c}*t + beta_{PM}* sin(2*pi*f_{m}*t))
beta_{PM} = (delta phi)/ and (delta phi) = maximum phase deviation = K*E_{m max}
Very important to note that here modulating signal = e_{m}(t) = E_{m max}*sin(2*pi*f_{m}t)
Instantenous total phase angle = phi_{PM}(t) = w_{c}*t+K*e_{m}(t)
= w_{c}*t+K*E_{m max}*sin(2*pi*f_{m}t)
= w_{c}*t+(delta phi)*sin(2*pi*f_{m}t) This results in
e_{PM}(t) = E_{c max}*cos(2*pi*f_{c}*t + (delta phi)* sin(2*pi*f_{m}*t))

For the given problem, using the above equations:
Considering the angle modulated wave to be FM:
instanteneous frequency = f_{i}(t) = d/dt of total instanteneous phase angle
= d/dt of (2*pi*10^{5}*t + 3*sin(2*pi*10^{2}*t))
= 2*pi*10^{5} + 2*pi*3*10^{2}*cos(2*pi*10^{2}*t)
Thus f_{i}(t=0.4*10^{-3}s) = 2*pi*10^{5} + 2*pi*3*10^{2}*cos(2*pi*10^{2}*(0.4*10^{-3}))
Maximum frequency deviation = (delta f) = 3*10^{2} Hz

Considering the angle modulated wave to be PM:
e_{PM}(t) = E_{c max}*cos(2*pi*f_{c}*t + (delta phi)* sin(2*pi*f_{m}*t))
Comparing with the expression in the problem, maximum phase deviation = (delta phi) = 3 radians.

(d) [Reference 10 pages 91-92]

12. (a) Pulse modulation systems transmit information much more efficiently than conventional AM or FM systems. A pulse modulated signal occupies only part of the channel time , so it becomes possible simultaneously transmit several pulse modulated signals simultaneously on the same channel on a time-sharing basis. This is called time-division multiplexing or TDM. [Reference 6 page 261] In pulse modulation systems, the continuous signal needs to be sampled at a rate prescribed by Nyquist criteria so that the original signal can be reconstructed from the samples at the receiving end.

Sampling theorem states that a signal which is bandlimited to B Hz (G(w)=0 for |w| > 2*pi*B), can be reconstructed exactly from its samples (without any distortion) if the samples were taken at a rate R >= 2*B Hz (samples per second). This criteria is known as Nyquist criterion for signal reconstruction from its samples. The minimum sampling rate = 2*B Hz is called Nyquist frequency and the corresponding sampling interval T_{s} = 1/(2*B) seconds is called Nyquist interval. [Reference 6 page 252]

(b) Stated in another way, the sampling theorem states that the sampling frequency must be at least twice the highest frequency in the modulating signal m(t) [Reference 9 page 387]

. For the problem cosA*cosB = 0.5*(Cos(A+B)+Cos(A-B))
Thus m(t) = 10*0.5*(Cos(1000*pi*t)+ Cos(6000*pi*t))
= 5*(Cos(2*pi*5000*t) + Cos(2*pi*3000*t))
This highest frequency component in the modulating signal has a frequency of 5000 Hz.
Therefore minimum sampling rate = f_{s} = 2*5000 Hz = 10,000 Hz.
The sampling interval T_{s} = 1/(f_{s}) = 1/(10^{4}) =10^{-4} seconds = 0.1 milli seconds.

(b) PWM and PPM stand for Pulse Width Modulation and Pulse Position Modulation respectively. They are different types of pulse modulation. In PWM, a continuous signal g(t) (also called the modulating signal m(t)) is sampled and the sample values are used to modulate or alter the amplitude of the pulses in a periodic pulse train. In PPM, the continuous signal g(t) (also called the modulating signal m(t)) is sampled and the sample values are used to modulate or alter the positions of the pulses in a periodic pulse train. [Reference 6 pages 260-261]

13. (a) [Reference 11].

(b) [Reference 10 page 242]

(c) [Reference 10 pages 25, 30-32]

Gr. B
Unit-II: Computer Science

14. (a) [Reference 4 pages 4-7, Reference 16 pages 6-8]

(b) A compiler tranlates the high level language in which the source code is written to the low level machine language which can be executed by the processor.

15. (a) [Reference 12].

(b) [Reference 13].

(c) An assembler is a program which tranlates an assembly language program to the corresponding low level machine language which can be executed by the processor. Just as the assembly language program is processor-specific, so is the assembler.

16. (a) [Reference 14].

(b) A hub is a simple networking device which connects different computers or different segments of a LAN to each other. A router is comparatively a much more sophisticated equipmemt used to connect LANs and WANs with each other. They receive packets of data, look at their source and destination IP addresses and thereafter forward or route the packets of data accordingly. A home router also called broadband router can join the home LAN to the Internet WAN. [Reference 15].


[1] Digital Logic and Computer Design M. Morris Mano Prentice Hall
[2] Digital circuits Vol 1 D. Ray Chaudhuri Platinum Publishers
[3] Digital Computer Electronics Malvino and Brown Tata McGraw-Hill 3rd Edition
[4] Microprocessor Architecture, Programming and Applcations with the 8085 Ramesh Gaonkar Penram International 5th Edition
[6]Modern Digital and Analog Communication Systems B. P. Lathi Oxford University Press 3rd edition
[9]Electronic Communications Dennis Roddy John Coolen Prentice Hall India 5th Edition
[10]Electronic Communication Systems George Kennedy and Bernard Davis Tata McGraw Hill 4th Edition
[16] Computer Architecture and Logic Design Thomas C. Bartee McGraw Hill International Edition

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