Paper: DSCC-15 Topic: VHDL programs

You may copy and execute the codes in an offline VHDL simulator like ModelSim or an online simulator like EDA Playground. Don't forget to rename the file extensions as '.vhd' from '.txt'. You may also use Intel Quartus Prime Lite Edition to design and simulate the results using its waveform generator. Try to understand each line of the programs by relating them to the concepts learnt in the class.

Logic Gates

logic gates design file

logic gates testbench file

output from EDA Playground console

Half-adder

half-adder design file

half_adder testbench file

output from EDA Playground console

Full-adder

full-adder design file

full_adder testbench file

output from EDA Playground console

4x1 Multiplexer

4x1 Multiplexer design file

4x1 Multiplexer testbench file

output from EDA Playground console

3x8 Decoder

3x8 Decoder design file

3x8 Decoder testbench file

output from EDA Playground console

J-K flip flop

J-K flip flop design file

J-K flip output waveforms



Paper: DSCC-15 Topic: VLSI experiments

Crystallographic Analysis and Particle Size Determination by X-Ray Diffraction (XRD) (of the given XRD Spectra stored in a csv file). The XRD data may also be synthetically generated using Gemini. The data is plotted using a Graph plotting and analyzing tool like Gnuplot or Origin, then the data corresponding to a single peak is separately fitted to a Gaussian curve, from which rest of the analysis follows.

Theory behind the experiment

Gnuplot script to plot and fit the data corresponding to a single peak

The XRD data obtained from experiment or synthetically generated

The output of the Gnuplot script

The resultant image of the fitted data used for analysis.

Simulating the thermal oxidation process in VLSI using Scilab and the Deal-Grove model.

Theory behind the experiment and the scilab program